Kandou
Digital Verification Engineer(m/w/x)
Vollzeit
Senior
Keine Angabe
Saint-Sulpice, Dortmund
KA
Kandou1 Monat
Digital Verification Lead Engineer(m/w/x)
Vollzeit
Senior
Keine Angabe
Saint-Sulpice, Lausanne, Dortmund
Nejo KI-Zusammenfassung
As a Digital Verification Lead Engineer, you will lead verification projects, mentor a team, and develop methodologies while collaborating with designers to ensure circuit designs meet specifications. This role involves planning, scheduling, and utilizing cutting-edge tools to enhance verification processes.
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Anforderungen
- •Excellent communication skills
- •Strong team player
- •Good scripting techniques
- •Experience with regression setup and management
- •Deep understanding of simulation and verification environments
- •Debugging techniques
- •Experience with Gate Level Simulation flows and debug
- •Strong knowledge on Metrics-driven verification
- •Experienced with test bench development using latest methodologies
- •Experience with 3rd party VIP usage and test development
- •Experience with emulation platforms and/or FPGA prototyping
- •Experience with Assertion Based Verification
- •7+ years’ experience in the semiconductor industry
- •Experience in leading and managing a team across multiple sites
- •Proven track record in verifying complex designs
- •Skilled in trade-offs between quality and schedule
- •Experience in constrained random test bench development
- •Familiarity with SerDes and high-level protocols
- •Extensive digital verification background with some UVM experience
- •Bachelor of Engineering in Electronics and Electrical Engineering or higher
Bachelor-Abschluss
Berufserfahrung
7 Jahre
Deine Aufgaben
- •Act as verification lead on projects
- •Provide technical leadership and mentoring
- •Prepare design verification plans based on specifications
- •Plan and schedule projects
- •Assign and track tasks for team members
- •Develop design verification methodologies
- •Implement standard debug flows
- •Participate in design reviews
- •Maintain the design verification environment
- •Track and close design bugs
- •Collaborate with designers on circuit design verification and validation
- •Utilize the latest techniques and tools for design verification
- •Coordinate and oversee external subcontractors for verification workloads
Sprachen
Englisch – verhandlungssicher
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