Description

You will lead the end-to-end FPGA development for a Quantum Key Distribution system, from architecting high-speed pipelines to mentoring junior talent and ensuring seamless hardware-software integration.

Requirements

• •5+ years production FPGA experience
• •Expert SystemVerilog RTL skills
• •Experience mentoring junior engineers
• •Strong constraints, timing, and floorplanning
• •Hands‑on DDR, PCIe, and Ethernet
• •Strong verification and regression testing
• •Knowledge of OSVVM/UVM (plus)
• •CI for HDL and debugging
• •System integration with SW/FW
• •Proficiency in English
• •Ability to work on-site
• •AXI4/AXI‑Stream and DMA expertise
• •Formal verification exposure
• •Scripting for automation and CI
• •MicroBlaze/Zynq ecosystem knowledge
• •Proven delivery on Xilinx FPGAs

Tasks

• •Architect and implement SystemVerilog RTL for AMD/Xilinx platforms
• •Integrate DDR3/DDR4 controllers and PCIe DMA endpoints
• •Manage Ethernet SFP paths and third-party IP
• •Build deterministic acquisition and timing layers
• •Design robust clocking and CDC architectures
• •Define AXI boundaries and register maps
• •Maintain XDC constraints and achieve timing closure
• •Apply floorplanning and placement guidance for margin
• •Establish professional verification environments using ModelSim
• •Develop self-checking testbenches and regression suites
• •Integrate Python and cocotb for co-simulation
• •Build CI pipelines for linting and synthesis
• •Lead board bring-up and hardware debugging
• •Package and version reproducible bitstream releases
• •Collaborate with software teams on system integration
• •Mentor junior engineers and codify design standards

Tools & Technologies

Benefits