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(Senior) DFT and ATPG Engineer(m/w/x)
IC design-for-test implementation for digital/mixed-signal chips, verifying test patterns via post-layout simulations at embedded semiconductor provider. Experience with Mentor test implementation tools and semiconductor physics knowledge essential. Remote work option.
Requirements
- Degree in Electrical Engineering or similar
- Experience in DFT implementation and ATPG
- Knowledge of Semiconductor Device Physics
- Experience with Mentor test implementation tools
- Experience with simulation tools
- Understanding of ATE pattern generation formats
- Self-motivation, drive, and teamwork skills
- Good communication and technical reporting skills
- Fluency in English and German knowledge
Tasks
- Drive DFT implementation for digital and mixed-signal ICs
- Analyze and understand various DFT implementation functionalities
- Implement DFT features using advanced EDA tools
- Generate digital design test patterns following industry best practices
- Verify ATPG patterns through post-layout simulations
- Provide ATE file requirements to the test development team
Work Experience
- 2 - 3 years
Education
- Bachelor's degree
Languages
- English – Business Fluent
- German – Basic
Tools & Technologies
- DFT
- ATPG
- Mentor test implementation tools
- Simulation tools
- STIL
- VCD
- ATE
Benefits
Informal Culture
- Flexible and inclusive work environment
Flexible Working
- Remote work option
Other Benefits
- Employee Resource Groups
- Global support system
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(Senior) DFT and ATPG Engineer(m/w/x)
IC design-for-test implementation for digital/mixed-signal chips, verifying test patterns via post-layout simulations at embedded semiconductor provider. Experience with Mentor test implementation tools and semiconductor physics knowledge essential. Remote work option.
Requirements
- Degree in Electrical Engineering or similar
- Experience in DFT implementation and ATPG
- Knowledge of Semiconductor Device Physics
- Experience with Mentor test implementation tools
- Experience with simulation tools
- Understanding of ATE pattern generation formats
- Self-motivation, drive, and teamwork skills
- Good communication and technical reporting skills
- Fluency in English and German knowledge
Tasks
- Drive DFT implementation for digital and mixed-signal ICs
- Analyze and understand various DFT implementation functionalities
- Implement DFT features using advanced EDA tools
- Generate digital design test patterns following industry best practices
- Verify ATPG patterns through post-layout simulations
- Provide ATE file requirements to the test development team
Work Experience
- 2 - 3 years
Education
- Bachelor's degree
Languages
- English – Business Fluent
- German – Basic
Tools & Technologies
- DFT
- ATPG
- Mentor test implementation tools
- Simulation tools
- STIL
- VCD
- ATE
Benefits
Informal Culture
- Flexible and inclusive work environment
Flexible Working
- Remote work option
Other Benefits
- Employee Resource Groups
- Global support system
About the Company
Renesas Electronics
Industry
IT
Description
The company is an embedded semiconductor solution provider offering scalable and comprehensive solutions for various industries.
Not a perfect match?
- Renesas Electronics
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Staff Digital Design Engineer(m/w/x)
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Principal Digital Verification Engineer(m/w/x)
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