Kandou
Digital Verification Engineer(m/w/x)
Full-timeOn-siteSenior
Saint-Sulpice, Dortmund
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KA
KandouFormal Verification Engineer(m/w/x)
Saint-Sulpice, Dortmund
Full-timeOn-siteSenior
Description
As a Formal Verification Engineer, you will focus on developing verification methodologies, participating in design reviews, and ensuring project timelines are met. This role involves collaborating with engineers to enhance efficiency through optimized verification models.
Let AI find the perfect jobs for you!
Upload your CV and Nejo AI will find matching job offers for you.
Requirements
- •Great communication skills
- •Analytical mindset
- •Strong teamwork skills
- •Good scripting techniques (Python, Perl, or TCL)
- •Deep understanding of Formal Verification technologies
- •Strong knowledge of metrics-driven verification
- •Proficiency in temporal logic assertion-based languages (SVA or PSL)
- •Knowledge of traditional simulation-based verification methodologies
- •Excellent analytical and problem-solving skills
- •Strong understanding of instruction-set architectures
- •Knowledge of Cadence JasperGold and VManager
- •5+ years of experience in the semiconductor industry
- •Proven track record in verifying complex designs
- •Skilled in trade-offs between quality and schedule
- •Familiarity with SerDes and high-level protocols
- •Delivered reusable and optimized formal models
- •Bachelor of Engineering in Electronics and Electrical Engineering
Education
Bachelor's degree
Work Experience
5 years
Tasks
- •Develop formal verification methodologies and best practices
- •Participate in RTL design reviews
- •Prepare design verification plans based on specifications
- •Document results and coverage metrics for formal sign-off
- •Plan and schedule projects for timely completion
- •Maintain the design verification environment
- •Track and close design bugs
- •Collaborate with RTL design engineers to create formal micro-architecture specifications
- •Deliver reusable and optimized formal models and verification codebases
Tools & Technologies
PythonPerlTCLCadence JasperGoldVManager
Languages
English – Business Fluent
Find the original job posting in its most current version here. Nejo automatically captured this job from the website of Kandou and processed the information on Nejo with the help of AI for you. Despite careful analysis, some information may be incomplete or inaccurate. Please always verify all details in the original posting! Content and copyrights of the original posting belong to the advertising company.
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- Kandou
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KA
KandouFormal Verification Engineer(m/w/x)
Saint-Sulpice, Dortmund
Full-timeOn-siteSenior
New Job?Nejo!
The AI Job Search Engine
Description
As a Formal Verification Engineer, you will focus on developing verification methodologies, participating in design reviews, and ensuring project timelines are met. This role involves collaborating with engineers to enhance efficiency through optimized verification models.
Let AI find the perfect jobs for you!
Upload your CV and Nejo AI will find matching job offers for you.
Requirements
- •Great communication skills
- •Analytical mindset
- •Strong teamwork skills
- •Good scripting techniques (Python, Perl, or TCL)
- •Deep understanding of Formal Verification technologies
- •Strong knowledge of metrics-driven verification
- •Proficiency in temporal logic assertion-based languages (SVA or PSL)
- •Knowledge of traditional simulation-based verification methodologies
- •Excellent analytical and problem-solving skills
- •Strong understanding of instruction-set architectures
- •Knowledge of Cadence JasperGold and VManager
- •5+ years of experience in the semiconductor industry
- •Proven track record in verifying complex designs
- •Skilled in trade-offs between quality and schedule
- •Familiarity with SerDes and high-level protocols
- •Delivered reusable and optimized formal models
- •Bachelor of Engineering in Electronics and Electrical Engineering
Education
Bachelor's degree
Work Experience
5 years
Tasks
- •Develop formal verification methodologies and best practices
- •Participate in RTL design reviews
- •Prepare design verification plans based on specifications
- •Document results and coverage metrics for formal sign-off
- •Plan and schedule projects for timely completion
- •Maintain the design verification environment
- •Track and close design bugs
- •Collaborate with RTL design engineers to create formal micro-architecture specifications
- •Deliver reusable and optimized formal models and verification codebases
Tools & Technologies
PythonPerlTCLCadence JasperGoldVManager
Languages
English – Business Fluent
Find the original job posting in its most current version here. Nejo automatically captured this job from the website of Kandou and processed the information on Nejo with the help of AI for you. Despite careful analysis, some information may be incomplete or inaccurate. Please always verify all details in the original posting! Content and copyrights of the original posting belong to the advertising company.
About the Company
Kandou
Industry
IT
Description
The company is an innovative leader in high-speed and energy-efficient chip-chip link solutions critical to the evolution of the electronics industry.
Not a perfect match?
- Kandou
Digital Verification Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice, Dortmund - Kandou
Digital Verification Lead Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice, Dortmund - Kandou
Mixed Signal Verification Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice, Lausanne, Dortmund - Kandou
DFT Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice, Lausanne - Kandou
Digital EDA / CAD Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice, Lausanne