Kandou
Digital Verification Engineer(m/w/x)
Full-timeOn-siteSenior
Saint-Sulpice, Dortmund
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KAKandou
Digital Verification Lead Engineer(m/w/x)
Saint-Sulpice, Dortmund
Full-timeOn-siteSenior
Nejo AI Summary
Leading verification for high-speed chip-chip link solutions, developing methodologies and debug flows. Gate Level Simulation flows experience and Metrics-driven verification knowledge essential. Technical leadership and mentoring opportunities.
Requirements
- Excellent communication and teamwork skills
- Good scripting and regression management experience
- Deep understanding of simulation and verification
- Experience with Gate Level Simulation flows
- Strong knowledge of Metrics-driven verification
- Experience with modern test bench development
- Experience with 3rd party VIP (advantageous)
- Experience with emulation or FPGA (advantageous)
- Experience with Assertion Based Verification (advantageous)
- 7+ years semiconductor industry experience
- Experience in multi-site team management
- Proven track record verifying complex designs
- Skill in quality and schedule trade-offs
- Experience in constrained random test development
- Familiarity with SerDes and high-level protocols
- Extensive digital verification and UVM experience
- Bachelor in Electronics/Electrical Engineering or higher
Tasks
- Act as the verification lead on projects
- Provide technical leadership and mentoring
- Prepare design verification plans based on specifications
- Plan projects and track team tasks
- Develop verification methodologies and debug flows
- Participate in design reviews
- Maintain verification environments and close bugs
- Verify and validate circuit designs with designers
- Utilize modern verification tools and technologies
- Oversee external sub-contractors to scale workloads
Work Experience
- 7 years
Education
- Bachelor's degree
Languages
- English – Business Fluent
Tools & Technologies
- Gate Level Simulation
- Metrics-driven verification
- 3rd party VIP
- Emulation platforms
- FPGA prototyping
- Assertion Based Verification
- SerDes
- PCIe
- USB
- DP
- UVM
Find the original job posting in its most current version here. Nejo automatically captured this job from the website of Kandou and processed the information on Nejo with the help of AI for you. Despite careful analysis, some information may be incomplete or inaccurate. Please always verify all details in the original posting! Content and copyrights of the original posting belong to the advertising company.
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- Kandou
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Advanced R&D Analog Design Engineer(m/w/x)
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KAKandou
Digital Verification Lead Engineer(m/w/x)
Saint-Sulpice, Dortmund
Full-timeOn-siteSenior
Nejo AI Summary
Leading verification for high-speed chip-chip link solutions, developing methodologies and debug flows. Gate Level Simulation flows experience and Metrics-driven verification knowledge essential. Technical leadership and mentoring opportunities.
Requirements
- Excellent communication and teamwork skills
- Good scripting and regression management experience
- Deep understanding of simulation and verification
- Experience with Gate Level Simulation flows
- Strong knowledge of Metrics-driven verification
- Experience with modern test bench development
- Experience with 3rd party VIP (advantageous)
- Experience with emulation or FPGA (advantageous)
- Experience with Assertion Based Verification (advantageous)
- 7+ years semiconductor industry experience
- Experience in multi-site team management
- Proven track record verifying complex designs
- Skill in quality and schedule trade-offs
- Experience in constrained random test development
- Familiarity with SerDes and high-level protocols
- Extensive digital verification and UVM experience
- Bachelor in Electronics/Electrical Engineering or higher
Tasks
- Act as the verification lead on projects
- Provide technical leadership and mentoring
- Prepare design verification plans based on specifications
- Plan projects and track team tasks
- Develop verification methodologies and debug flows
- Participate in design reviews
- Maintain verification environments and close bugs
- Verify and validate circuit designs with designers
- Utilize modern verification tools and technologies
- Oversee external sub-contractors to scale workloads
Work Experience
- 7 years
Education
- Bachelor's degree
Languages
- English – Business Fluent
Tools & Technologies
- Gate Level Simulation
- Metrics-driven verification
- 3rd party VIP
- Emulation platforms
- FPGA prototyping
- Assertion Based Verification
- SerDes
- PCIe
- USB
- DP
- UVM
Find the original job posting in its most current version here. Nejo automatically captured this job from the website of Kandou and processed the information on Nejo with the help of AI for you. Despite careful analysis, some information may be incomplete or inaccurate. Please always verify all details in the original posting! Content and copyrights of the original posting belong to the advertising company.
About the Company
Kandou
Industry
Engineering
Description
The company is an innovative leader in high-speed and energy-efficient chip-chip link solutions critical to the evolution of the electronics industry.
Not a perfect match?
- Kandou
Digital Verification Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice, Dortmund - Kandou
Mixed Signal Verification Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice, Lausanne, Dortmund - Kandou
Advanced R&D Analog Design Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice - Kandou
Modeling Engineer(m/w/x)
Full-timeOn-siteSeniorSaint-Sulpice, Lausanne - SICPA SA
Test Lead(m/w/x)
Full-timeOn-siteSeniorPrilly