Micron Semiconductor GmBH
DRAM Design Engineer(m/w/x)
Full-timeOn-siteExperienced
München
The AI Job Search Engine
RTL-to-Gate Level synthesis and timing constraint for MCU SoCs. Static Timing Analysis and clock tree implementation expertise required. Close collaboration with design front-end teams.
Not a perfect match?
RTL-to-Gate Level synthesis and timing constraint for MCU SoCs. Static Timing Analysis and clock tree implementation expertise required. Close collaboration with design front-end teams.
NXP Semiconductors Germany GmbH
Industry
Engineering
Description
The company drives vehicle connectivity and energy efficiency, developing solutions for the vehicles of tomorrow.
Not a perfect match?
Nejo is an AI – results may be incomplete or contain mistakes