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Test Engineer, Automotive Robotics(m/w/x)
Design and test strategies for multi-die SiP platforms and RISC-V chiplet SoCs at AI hardware firm. 10+ years of cross-team coordination and ASIC production experience required. High-volume production oversight with external OSAT partners.
Requirements
- Experience with ASIC design and production
- Ability to translate system requirements
- Confidence working with external vendors
- Comfort in cross-functional DFT roles
- 10+ years of cross-team coordination
- Eligibility for U.S. export-controlled technology
Tasks
- Design and deliver core hardware modules for next-generation automotive chiplet SoCs
- Bridge silicon design, DFT, OSAT partners, and customers
- Ensure multi-die SiP platforms meet performance, quality, and safety targets
- Define test strategies for multi-chiplet packages from initial silicon to high-volume production
- Integrate lessons learned into next-generation SiP architectures and DFT strategies
- Optimize test content based on previous production cycles
- Manage the transition of SiP modules to high-volume automotive-grade production
- Unify chiplets, RISC-V CPUs, AI accelerators, and die-to-die links into automotive platforms
- Balance package architecture and DFT against test costs
- Meet aggressive performance, quality, and reliability targets through strategic trade-offs
Work Experience
- 10 years
Education
- Master's degree
Languages
- English – Business Fluent
Tools & Technologies
- ASIC
- DFT
- ATE
- SLT
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Test Engineer, Automotive Robotics(m/w/x)
Design and test strategies for multi-die SiP platforms and RISC-V chiplet SoCs at AI hardware firm. 10+ years of cross-team coordination and ASIC production experience required. High-volume production oversight with external OSAT partners.
Requirements
- Experience with ASIC design and production
- Ability to translate system requirements
- Confidence working with external vendors
- Comfort in cross-functional DFT roles
- 10+ years of cross-team coordination
- Eligibility for U.S. export-controlled technology
Tasks
- Design and deliver core hardware modules for next-generation automotive chiplet SoCs
- Bridge silicon design, DFT, OSAT partners, and customers
- Ensure multi-die SiP platforms meet performance, quality, and safety targets
- Define test strategies for multi-chiplet packages from initial silicon to high-volume production
- Integrate lessons learned into next-generation SiP architectures and DFT strategies
- Optimize test content based on previous production cycles
- Manage the transition of SiP modules to high-volume automotive-grade production
- Unify chiplets, RISC-V CPUs, AI accelerators, and die-to-die links into automotive platforms
- Balance package architecture and DFT against test costs
- Meet aggressive performance, quality, and reliability targets through strategic trade-offs
Work Experience
- 10 years
Education
- Master's degree
Languages
- English – Business Fluent
Tools & Technologies
- ASIC
- DFT
- ATE
- SLT
About the Company
Tenstorrent
Industry
IT
Description
Tenstorrent leads in AI technology, revolutionizing performance, ease of use, and cost efficiency with its RISC-V CPU.
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