Kandou
Digital Verification Engineer(m/w/x)
Vollzeitnur vor OrtSenior
Saint-Sulpice, Dortmund
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KAKandou
Digital Verification Lead Engineer(m/w/x)
Saint-Sulpice, Dortmund
VollzeitVor OrtSenior
Nejo KI-Zusammenfassung
Leading verification for high-speed chip-chip link solutions, developing methodologies and debug flows. Gate Level Simulation flows experience and Metrics-driven verification knowledge essential. Technical leadership and mentoring opportunities.
Anforderungen
- Excellent communication and teamwork skills
- Good scripting and regression management experience
- Deep understanding of simulation and verification
- Experience with Gate Level Simulation flows
- Strong knowledge of Metrics-driven verification
- Experience with modern test bench development
- Experience with 3rd party VIP (advantageous)
- Experience with emulation or FPGA (advantageous)
- Experience with Assertion Based Verification (advantageous)
- 7+ years semiconductor industry experience
- Experience in multi-site team management
- Proven track record verifying complex designs
- Skill in quality and schedule trade-offs
- Experience in constrained random test development
- Familiarity with SerDes and high-level protocols
- Extensive digital verification and UVM experience
- Bachelor in Electronics/Electrical Engineering or higher
Aufgaben
- Act as the verification lead on projects
- Provide technical leadership and mentoring
- Prepare design verification plans based on specifications
- Plan projects and track team tasks
- Develop verification methodologies and debug flows
- Participate in design reviews
- Maintain verification environments and close bugs
- Verify and validate circuit designs with designers
- Utilize modern verification tools and technologies
- Oversee external sub-contractors to scale workloads
Berufserfahrung
- 7 Jahre
Ausbildung
- Bachelor-Abschluss
Sprachen
- Englisch – verhandlungssicher
Tools & Technologien
- Gate Level Simulation
- Metrics-driven verification
- 3rd party VIP
- Emulation platforms
- FPGA prototyping
- Assertion Based Verification
- SerDes
- PCIe
- USB
- DP
- UVM
Die Originalanzeige dieses Stellenangebotes in der aktuellsten Version findest du hier. Nejo hat diesen Job automatisch von der Website des Unternehmens Kandou erfasst und die Informationen auf Nejo mit Hilfe von KI für dich aufbereitet. Trotz sorgfältiger Analyse können einzelne Informationen unvollständig oder ungenau sein. Bitte prüfe immer alle Angaben in der Originalanzeige! Inhalte und Urheberrechte der Originalanzeige liegen beim ausschreibenden Unternehmen.
Noch nicht perfekt?
- Kandou
Mixed Signal Verification Engineer(m/w/x)
Vollzeitnur vor OrtSeniorSaint-Sulpice, Lausanne, Dortmund - Kandou
Advanced R&D Analog Design Engineer(m/w/x)
Vollzeitnur vor OrtSeniorSaint-Sulpice - Kandou
Modeling Engineer(m/w/x)
Vollzeitnur vor OrtSeniorSaint-Sulpice, Lausanne - SICPA SA
Test Lead(m/w/x)
Vollzeitnur vor OrtSeniorPrilly
KAKandou
Digital Verification Lead Engineer(m/w/x)
Saint-Sulpice, Dortmund
VollzeitVor OrtSenior
Nejo KI-Zusammenfassung
Leading verification for high-speed chip-chip link solutions, developing methodologies and debug flows. Gate Level Simulation flows experience and Metrics-driven verification knowledge essential. Technical leadership and mentoring opportunities.
Anforderungen
- Excellent communication and teamwork skills
- Good scripting and regression management experience
- Deep understanding of simulation and verification
- Experience with Gate Level Simulation flows
- Strong knowledge of Metrics-driven verification
- Experience with modern test bench development
- Experience with 3rd party VIP (advantageous)
- Experience with emulation or FPGA (advantageous)
- Experience with Assertion Based Verification (advantageous)
- 7+ years semiconductor industry experience
- Experience in multi-site team management
- Proven track record verifying complex designs
- Skill in quality and schedule trade-offs
- Experience in constrained random test development
- Familiarity with SerDes and high-level protocols
- Extensive digital verification and UVM experience
- Bachelor in Electronics/Electrical Engineering or higher
Aufgaben
- Act as the verification lead on projects
- Provide technical leadership and mentoring
- Prepare design verification plans based on specifications
- Plan projects and track team tasks
- Develop verification methodologies and debug flows
- Participate in design reviews
- Maintain verification environments and close bugs
- Verify and validate circuit designs with designers
- Utilize modern verification tools and technologies
- Oversee external sub-contractors to scale workloads
Berufserfahrung
- 7 Jahre
Ausbildung
- Bachelor-Abschluss
Sprachen
- Englisch – verhandlungssicher
Tools & Technologien
- Gate Level Simulation
- Metrics-driven verification
- 3rd party VIP
- Emulation platforms
- FPGA prototyping
- Assertion Based Verification
- SerDes
- PCIe
- USB
- DP
- UVM
Die Originalanzeige dieses Stellenangebotes in der aktuellsten Version findest du hier. Nejo hat diesen Job automatisch von der Website des Unternehmens Kandou erfasst und die Informationen auf Nejo mit Hilfe von KI für dich aufbereitet. Trotz sorgfältiger Analyse können einzelne Informationen unvollständig oder ungenau sein. Bitte prüfe immer alle Angaben in der Originalanzeige! Inhalte und Urheberrechte der Originalanzeige liegen beim ausschreibenden Unternehmen.
Über das Unternehmen
Kandou
Branche
Engineering
Beschreibung
The company is an innovative leader in high-speed and energy-efficient chip-chip link solutions critical to the evolution of the electronics industry.
Noch nicht perfekt?
- Kandou
Digital Verification Engineer(m/w/x)
Vollzeitnur vor OrtSeniorSaint-Sulpice, Dortmund - Kandou
Mixed Signal Verification Engineer(m/w/x)
Vollzeitnur vor OrtSeniorSaint-Sulpice, Lausanne, Dortmund - Kandou
Advanced R&D Analog Design Engineer(m/w/x)
Vollzeitnur vor OrtSeniorSaint-Sulpice - Kandou
Modeling Engineer(m/w/x)
Vollzeitnur vor OrtSeniorSaint-Sulpice, Lausanne - SICPA SA
Test Lead(m/w/x)
Vollzeitnur vor OrtSeniorPrilly