The AI Job Search Engine
System on Chip (SoC) Verification Engineer(m/w/x)
Description
As a SoC Verification Engineer, you will engage in pre-silicon RTL verification of SoC designs, collaborating with teams to create a modern verification environment. You will develop testbenches and ensure high coding standards.
Let AI find the perfect jobs for you!
Upload your CV and Nejo AI will find matching job offers for you.
Requirements
- •University degree in electrical engineering, IT/computer science, or related field
- •Solid understanding of digital logic design and RISC-V-based SoC architecture
- •Proven experience with SystemVerilog and UVM-based verification environments
- •Very good English and good German language skills
- •Proactive and independent mindset
- •Familiarity with C/C++ programming, assembly, and object-oriented languages such as Python
- •Knowledge of industry-standard interfaces and bus protocols (e.g., AXI)
- •Experience with IP verification methods, integration verification specific to RISC-V and embedded CPU verification
- •Interest in low power verification techniques and formal verification tools (e.g. JasperGold)
Education
Tasks
- •Understand RISC-V architectures and low-power designs
- •Build block and chip level testbenches using verification methodologies
- •Translate design specifications into verification plans
- •Develop and maintain reusable testbenches for IP/block-level verification
- •Support IP integration verification
- •Create constraint-random and directed test cases for RISC-V SoCs
- •Build and analyze coverage models
- •Refine tests to close coverage gaps
- •Debug test failures and manage bug tracking
- •Ensure coverage closure
- •Lead verification reviews to maintain coding quality
- •Prepare, run, and evaluate regression runs
Tools & Technologies
Languages
German – Advanced
English – Business Fluent
Benefits
Informal Culture
- •Friendly working atmosphere
- •Creative freedom
Learning & Development
- •Personal development opportunities
Flexible Working
- •Flexible working hours
Career Advancement
- •Career program for female scientists
- RANOVUSFull-timeOn-siteExperiencedNürnberg
- Huawei Research Center Germany & Austria
Hardware Design Engineer(m/w/x)
Full-timeOn-siteExperiencedNürnberg - RANOVUS
ASIC Validation Engineer(m/w/x)
Full-timeOn-siteExperiencedNürnberg - Bertrandt
Software-Testingenieur(m/w/x)
Full-timeOn-siteNot specifiedNürnberg - Huawei Research Center Germany & Austria
Principal Power Electronics Engineer - Computing Systems (Datacenter, Telecom, ASICs, xPU, HPCs)(m/w/x)
Full-timeOn-siteExperiencedNürnberg
System on Chip (SoC) Verification Engineer(m/w/x)
The AI Job Search Engine
Description
As a SoC Verification Engineer, you will engage in pre-silicon RTL verification of SoC designs, collaborating with teams to create a modern verification environment. You will develop testbenches and ensure high coding standards.
Let AI find the perfect jobs for you!
Upload your CV and Nejo AI will find matching job offers for you.
Requirements
- •University degree in electrical engineering, IT/computer science, or related field
- •Solid understanding of digital logic design and RISC-V-based SoC architecture
- •Proven experience with SystemVerilog and UVM-based verification environments
- •Very good English and good German language skills
- •Proactive and independent mindset
- •Familiarity with C/C++ programming, assembly, and object-oriented languages such as Python
- •Knowledge of industry-standard interfaces and bus protocols (e.g., AXI)
- •Experience with IP verification methods, integration verification specific to RISC-V and embedded CPU verification
- •Interest in low power verification techniques and formal verification tools (e.g. JasperGold)
Education
Tasks
- •Understand RISC-V architectures and low-power designs
- •Build block and chip level testbenches using verification methodologies
- •Translate design specifications into verification plans
- •Develop and maintain reusable testbenches for IP/block-level verification
- •Support IP integration verification
- •Create constraint-random and directed test cases for RISC-V SoCs
- •Build and analyze coverage models
- •Refine tests to close coverage gaps
- •Debug test failures and manage bug tracking
- •Ensure coverage closure
- •Lead verification reviews to maintain coding quality
- •Prepare, run, and evaluate regression runs
Tools & Technologies
Languages
German – Advanced
English – Business Fluent
Benefits
Informal Culture
- •Friendly working atmosphere
- •Creative freedom
Learning & Development
- •Personal development opportunities
Flexible Working
- •Flexible working hours
Career Advancement
- •Career program for female scientists
About the Company
Fraunhofer-Institut für Integrierte Schaltungen IIS
Industry
Research
Description
Das Unternehmen ist eines der weltweit führenden Institute für anwendungsorientierte Forschung in den Bereichen Künstliche Intelligenz, Mikroelektronik und Datenerfassung.
- RANOVUS
Analog ASIC Design Engineer(m/w/x)
Full-timeOn-siteExperiencedNürnberg - Huawei Research Center Germany & Austria
Hardware Design Engineer(m/w/x)
Full-timeOn-siteExperiencedNürnberg - RANOVUS
ASIC Validation Engineer(m/w/x)
Full-timeOn-siteExperiencedNürnberg - Bertrandt
Software-Testingenieur(m/w/x)
Full-timeOn-siteNot specifiedNürnberg - Huawei Research Center Germany & Austria
Principal Power Electronics Engineer - Computing Systems (Datacenter, Telecom, ASICs, xPU, HPCs)(m/w/x)
Full-timeOn-siteExperiencedNürnberg