Aumovio
(Senior) ASIC Analog Design Engineer(m/w/x)
Full-timeOn-siteSenior
Frankfurt am Main
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AUAumovio
ASIC Analog Layout Engineer(m/w/x)
Frankfurt am Main
Full-timeOn-siteSenior
Nejo AI Summary
Top-level layout integration of analog/mixed-signal chips for mobility hardware. Extensive professional experience in analog layout design required. Fabless semiconductor manufacturing, BCD technologies (65nm-180nm).
Requirements
- Academic degree in Electronics Engineering or related field
- Extensive professional experience in analog layout design
- Proven experience in top-level layout integration
- Strong expertise in BCD technologies (65nm to 180nm)
- Deep understanding of deep submicron effects
- Proficient in layout tools for design, DRC, LVS, and extraction
- Knowledge of analog circuit design
- Fluent English language skills
- German language skills are a plus
- English language
Tasks
- Drive top-level layout integration of analog/mixed-signal chips
- Define top-level floorplan, padframe design, and bonding diagrams
- Coordinate with other layout engineers for floorplan alignment
- Generate and integrate analog layouts at block and chip level
- Perform pin placement, parasitic extraction, and layout optimization
- Ensure DRC, LVS compliance, and support tape-out activities
- Collaborate with design engineers to meet speed, area, power, DFM, ESD, and EMC requirements
Work Experience
- approx. 4 - 6 years
Education
- Bachelor's degree
Languages
- English – Fluent
- German – Basic
Tools & Technologies
- BCD technologies
- layout tools
- DRC
- LVS
Find the original job posting in its most current version here. Nejo automatically captured this job from the website of Aumovio and processed the information on Nejo with the help of AI for you. Despite careful analysis, some information may be incomplete or inaccurate. Please always verify all details in the original posting! Content and copyrights of the original posting belong to the advertising company.
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AUAumovio
ASIC Analog Layout Engineer(m/w/x)
Frankfurt am Main
Full-timeOn-siteSenior
Nejo AI Summary
Top-level layout integration of analog/mixed-signal chips for mobility hardware. Extensive professional experience in analog layout design required. Fabless semiconductor manufacturing, BCD technologies (65nm-180nm).
Requirements
- Academic degree in Electronics Engineering or related field
- Extensive professional experience in analog layout design
- Proven experience in top-level layout integration
- Strong expertise in BCD technologies (65nm to 180nm)
- Deep understanding of deep submicron effects
- Proficient in layout tools for design, DRC, LVS, and extraction
- Knowledge of analog circuit design
- Fluent English language skills
- German language skills are a plus
- English language
Tasks
- Drive top-level layout integration of analog/mixed-signal chips
- Define top-level floorplan, padframe design, and bonding diagrams
- Coordinate with other layout engineers for floorplan alignment
- Generate and integrate analog layouts at block and chip level
- Perform pin placement, parasitic extraction, and layout optimization
- Ensure DRC, LVS compliance, and support tape-out activities
- Collaborate with design engineers to meet speed, area, power, DFM, ESD, and EMC requirements
Work Experience
- approx. 4 - 6 years
Education
- Bachelor's degree
Languages
- English – Fluent
- German – Basic
Tools & Technologies
- BCD technologies
- layout tools
- DRC
- LVS
Find the original job posting in its most current version here. Nejo automatically captured this job from the website of Aumovio and processed the information on Nejo with the help of AI for you. Despite careful analysis, some information may be incomplete or inaccurate. Please always verify all details in the original posting! Content and copyrights of the original posting belong to the advertising company.
About the Company
Aumovio
Industry
IT
Description
Das Unternehmen AUMOVIO bietet ein breites Portfolio für sichere, vernetzte und autonome Mobilität, einschließlich Sensorlösungen und Softwareexpertise.
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