Semtech
Digital Signal Processing (DSP) Engineer(m/w/x)
Full-timeOn-siteExperienced
Neuenburg
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SESemtech_Neuchatel_SARL
Staff Verification Engineer(m/w/x)
Neuenburg
Full-timeOn-siteSenior
Nejo AI Summary
Pre-silicon RTL verification at block and SoC levels for LPWAN IoT solutions. UVM-based verification methodologies and SystemVerilog proficiency required. Collaboration with design and architecture teams.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
- Strong UVM-based verification methodologies experience
- Proven test and verification plans definition and execution experience
- Coverage-driven verification and analysis experience
- SystemVerilog and assertion-based verification proficiency
- Familiarity with industry-standard verification tools
- IC design verification experience at block and SoC level
- Formal verification techniques knowledge
- Bus architectures verification experience in UVM environments
- Low-power verification methodologies understanding
- Strong analytical, debugging, and problem-solving skills
- Excellent communication and teamwork abilities
- Strong programming skills in Python
- Wireless SoC design and verification experience
- Scripting languages knowledge for automation
- Version control systems familiarity
Tasks
- Lead pre-silicon RTL verification at block and SoC levels
- Define comprehensive verification strategies
- Execute comprehensive verification strategies
- Ensure design robustness using coverage-driven methodologies
- Collaborate with design and architecture teams
- Define test plans based on design specifications
- Implement test plans based on design specifications
- Develop assertion-based checkers
- Develop functional coverage models
- Perform functional verification of RTL designs using UVM
- Generate coverage reports
- Analyze coverage reports
- Understand system requirements with design and architecture teams
- Ensure alignment with design and architecture teams
- Identify verification issues
- Debug verification issues
- Resolve verification issues
- Identify design bugs
- Debug design bugs
- Resolve design bugs
- Drive continuous improvement of verification processes
- Drive continuous improvement of verification methodologies
- Drive continuous improvement of verification tools
Work Experience
- 8 years
Education
- Bachelor's degreeOR
- Master's degree
Languages
- English – Business Fluent
Tools & Technologies
- UVM
- SystemVerilog
- VCS
- QuestaSim
- Python
- Tcl
- Perl
- Git
- AMBA AHB/AXI
- NoC
- Bus Fabric
Find the original job posting in its most current version here. Nejo automatically captured this job from the website of Semtech_Neuchatel_SARL and processed the information on Nejo with the help of AI for you. Despite careful analysis, some information may be incomplete or inaccurate. Please always verify all details in the original posting! Content and copyrights of the original posting belong to the advertising company.
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SESemtech_Neuchatel_SARL
Staff Verification Engineer(m/w/x)
Neuenburg
Full-timeOn-siteSenior
Nejo AI Summary
Pre-silicon RTL verification at block and SoC levels for LPWAN IoT solutions. UVM-based verification methodologies and SystemVerilog proficiency required. Collaboration with design and architecture teams.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
- Strong UVM-based verification methodologies experience
- Proven test and verification plans definition and execution experience
- Coverage-driven verification and analysis experience
- SystemVerilog and assertion-based verification proficiency
- Familiarity with industry-standard verification tools
- IC design verification experience at block and SoC level
- Formal verification techniques knowledge
- Bus architectures verification experience in UVM environments
- Low-power verification methodologies understanding
- Strong analytical, debugging, and problem-solving skills
- Excellent communication and teamwork abilities
- Strong programming skills in Python
- Wireless SoC design and verification experience
- Scripting languages knowledge for automation
- Version control systems familiarity
Tasks
- Lead pre-silicon RTL verification at block and SoC levels
- Define comprehensive verification strategies
- Execute comprehensive verification strategies
- Ensure design robustness using coverage-driven methodologies
- Collaborate with design and architecture teams
- Define test plans based on design specifications
- Implement test plans based on design specifications
- Develop assertion-based checkers
- Develop functional coverage models
- Perform functional verification of RTL designs using UVM
- Generate coverage reports
- Analyze coverage reports
- Understand system requirements with design and architecture teams
- Ensure alignment with design and architecture teams
- Identify verification issues
- Debug verification issues
- Resolve verification issues
- Identify design bugs
- Debug design bugs
- Resolve design bugs
- Drive continuous improvement of verification processes
- Drive continuous improvement of verification methodologies
- Drive continuous improvement of verification tools
Work Experience
- 8 years
Education
- Bachelor's degreeOR
- Master's degree
Languages
- English – Business Fluent
Tools & Technologies
- UVM
- SystemVerilog
- VCS
- QuestaSim
- Python
- Tcl
- Perl
- Git
- AMBA AHB/AXI
- NoC
- Bus Fabric
Find the original job posting in its most current version here. Nejo automatically captured this job from the website of Semtech_Neuchatel_SARL and processed the information on Nejo with the help of AI for you. Despite careful analysis, some information may be incomplete or inaccurate. Please always verify all details in the original posting! Content and copyrights of the original posting belong to the advertising company.
About the Company
Semtech_Neuchatel_SARL
Industry
IT
Description
Semtech is committed to empowering professional development through mentorship, continuous learning, and a collaborative engineering environment.
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