Description

As a Mixed Signal Verification Engineer, you will focus on creating verification plans and debugging designs while collaborating with teams to enhance methodologies and document findings. Each day presents new challenges in a dynamic environment.

Requirements

• •Good scripting techniques
• •Good understanding of fabrication process, process corners, simulation, and verification setup
• •Very good knowledge on electrical and discrete test benches / solvers in terms of run time optimization
• •Very good knowledge about simulation tools and debugging techniques
• •Good understanding of revision control
• •Good communication and reporting skills
• •At least 10 years of experience on digital/mixed signal/analog verification
• •Experience in behavioral modelling
• •Basic knowledge of analog building blocks
• •Experience with fast analog solver e.g., Cadence APS, SpectreX / digital solver e.g., Cadence Xcelium
• •Experience in constrained random testbench development
• •Experience in System Verilog Assertions
• •Experience with Cadence Ocean Script
• •Experience with Cadence Virtuoso Framework: Schematic editor, Assembler, AMS
• •Experience on high-speed communication systems such as SerDes would be a plus
• •Good digital verification background with some Specman/SV UVM exposure and/or analog verification background

Tasks

• •Develop verification plans for high-speed SerDes designs
• •Debug and report issues to the design team
• •Enhance methodologies with the verification team and EDA vendors
• •Document and track verification tasks, bug findings, and methodology improvements

Tools & Technologies