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Master's Thesis Student – Digital Control-Loop Development for Space Applications(m/w/x)
Digital control-loop development for space applications, implementing VHDL/C code on Xilinx FPGA/VIVADO. Practical FPGA development experience and signal processing background needed. 35-hour week, flexitime.
Requirements
- Enrollment in relevant Master's program
- Background in signal processing or control theory
- Practical experience in FPGA development
- Programming skills in C/C++, MATLAB, or Python
- Analytical skills and problem-solving abilities
- Independent and collaborative work ability
- Good English and optional German skills
- Compliance awareness and integrity commitment
Tasks
- Implement VHDL and C code
- Use Xilinx FPGA and VIVADO environments
- Optimize existing FPGA-based control systems
- Develop adaptive control strategies
- Design analog and digital interface electronics
- Perform data analysis and simulations
- Evaluate closed-loop system performance
- Build a GUI for real-time monitoring
- Document development steps and results
Education
- Master's degree
Languages
- English – Business Fluent
- German – Basic
Tools & Technologies
- FPGA
- VHDL
- Verilog
- Xilinx
- VIVADO
- C
- C++
- MATLAB
- Python
Benefits
Competitive Pay
- Attractive salary
Flexible Working
- Flexitime
- Flexible working arrangements
Informal Culture
- International environment
Career Advancement
- Global networking opportunities
Diverse Work
- Modern and diversified technologies
Team Events
- Weekly team meetings
Social Impact
- Generation Airbus Community participation
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Master's Thesis Student – Digital Control-Loop Development for Space Applications(m/w/x)
Digital control-loop development for space applications, implementing VHDL/C code on Xilinx FPGA/VIVADO. Practical FPGA development experience and signal processing background needed. 35-hour week, flexitime.
Requirements
- Enrollment in relevant Master's program
- Background in signal processing or control theory
- Practical experience in FPGA development
- Programming skills in C/C++, MATLAB, or Python
- Analytical skills and problem-solving abilities
- Independent and collaborative work ability
- Good English and optional German skills
- Compliance awareness and integrity commitment
Tasks
- Implement VHDL and C code
- Use Xilinx FPGA and VIVADO environments
- Optimize existing FPGA-based control systems
- Develop adaptive control strategies
- Design analog and digital interface electronics
- Perform data analysis and simulations
- Evaluate closed-loop system performance
- Build a GUI for real-time monitoring
- Document development steps and results
Education
- Master's degree
Languages
- English – Business Fluent
- German – Basic
Tools & Technologies
- FPGA
- VHDL
- Verilog
- Xilinx
- VIVADO
- C
- C++
- MATLAB
- Python
Benefits
Competitive Pay
- Attractive salary
Flexible Working
- Flexitime
- Flexible working arrangements
Informal Culture
- International environment
Career Advancement
- Global networking opportunities
Diverse Work
- Modern and diversified technologies
Team Events
- Weekly team meetings
Social Impact
- Generation Airbus Community participation
Like this job?
BetaYour Career Agent finds similar jobs for you every day.
About the Company
Airbus Defence and Space GmbH
Industry
Aerospace
Description
Airbus is committed to achieving workforce diversity and creating an inclusive working environment.
Not a perfect match?
- Airbus Defence and Space GmbH
Master Thesis(m/w/x)
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