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IO Design Architect – High Speed Memory Interfaces(m/w/x)
Block-level simulation, schematic implementation, and silicon bring-up for memory solutions. 10 years mixed-signal IO design experience required. Work with SPICE, Cadence, and Synopsys environments.
Requirements
- 10 years experience designing mixed-signal IO
- Proficiency with SPICE or similar tools
- Experience with Cadence or Synopsys environments
- Ability to evaluate block-level behavior
- Experience in Unix/Linux environments
- Scripting skills for analysis or automation
- Familiarity with extraction and modeling tools
- Collaboration in semiconductor design teams
Tasks
- Define IO and PHY concepts for high-speed memory interfaces
- Perform block-level simulation and feasibility checks
- Conduct detailed architectural analysis
- Guide schematic-level implementation to ensure architectural alignment
- Support verification and silicon bring-up activities
- Assist with complex debug operations
- Collaborate with global cross-functional teams on system integration
- Use automation and AI tools to improve modeling workflows
Work Experience
- 10 years
Education
- Bachelor's degreeOR
- Master's degree
Languages
- English – Business Fluent
Tools & Technologies
- SPICE
- Cadence
- Synopsys
- Unix
- Linux
- Python
- TCL
- SKILL
- Perl
Benefits
Other Benefits
- Assistance with application process
- Reasonable accommodations
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IO Design Architect – High Speed Memory Interfaces(m/w/x)
Block-level simulation, schematic implementation, and silicon bring-up for memory solutions. 10 years mixed-signal IO design experience required. Work with SPICE, Cadence, and Synopsys environments.
Requirements
- 10 years experience designing mixed-signal IO
- Proficiency with SPICE or similar tools
- Experience with Cadence or Synopsys environments
- Ability to evaluate block-level behavior
- Experience in Unix/Linux environments
- Scripting skills for analysis or automation
- Familiarity with extraction and modeling tools
- Collaboration in semiconductor design teams
Tasks
- Define IO and PHY concepts for high-speed memory interfaces
- Perform block-level simulation and feasibility checks
- Conduct detailed architectural analysis
- Guide schematic-level implementation to ensure architectural alignment
- Support verification and silicon bring-up activities
- Assist with complex debug operations
- Collaborate with global cross-functional teams on system integration
- Use automation and AI tools to improve modeling workflows
Work Experience
- 10 years
Education
- Bachelor's degreeOR
- Master's degree
Languages
- English – Business Fluent
Tools & Technologies
- SPICE
- Cadence
- Synopsys
- Unix
- Linux
- Python
- TCL
- SKILL
- Perl
Benefits
Other Benefits
- Assistance with application process
- Reasonable accommodations
Like this job?
BetaYour Career Agent finds similar jobs for you every day.
About the Company
Micron Semiconductor GmBH
Industry
IT
Description
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence.
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